AI Processors, such as prominent models like Graphcore and the enhanced NVIDIA A-100, demonstrate formidable computational power. With power consumption levels varying between 150W and 350W, these chips contain thousands of processors. While such dense integration enhances performance, it also complicates the challenge of delivering power efficiently.
Key Testing Considerations
- Ensuring adequate power delivery without waste
- Efficient thermal management of tester and DUT
Power Limitations in Testing Procedures
Current testing methodologies often fall short in providing the necessary power to test an entire AI Processor simultaneously. Manufacturers frequently resort to testing individual sections sequentially. A more holistic approach to testing could result in both time and cost savings.
While high demand and pricing currently offset the testing expenses for AI processors, this balance is likely to shift. As AI technologies become more pervasive, the cost of these chips is expected to decline, necessitating a proportional reduction in the Cost of Testing (COT).
Advancing Power Efficiency with Elevate
Elevate specializes in Device Power Supply (DPS) semiconductors engineered to meet the specific power requirements of AI Processors. Our designs aim to improve power delivery to the Device Under Test (DUT), while also reducing power during the testing phase. This enhanced efficiency makes it possible to test larger segments of an AI processor simultaneously.
The majority of AI Processors operate at voltages of 1V or below. Conventional DPS solutions often require significant overhead, leading to wasted energy. Elevate’s design integrates the switching function of the linear stage for maximized per-channel efficiency. By pairing a low-overhead linear stage with the switching phase, we achieve optimized power efficiency and significantly reduce switching noise.
